soc

System on Chip Seminar

Mentor Graphics Finland

HW/SW CO-VERIFICATION WITH SEAMLESS

The last embedded design didn't go well and the next one is 3X larger. How are you going to verify that the functionality defined in the specification is correct? Mixing cores, IP, existing software, hardware from the last project, and a lot of new functionality you haven't designed yet? Once'it’s designed, is it going to take forever to write the test bench and verify the design? What tool can handle this kind of design challenge? Seamless - the open verification solution for all areas of design! Attend this session to see the Seamless SOC verification environment with connections to system design and intelligent test benches.

VIVACE: VIRTUAL SYSTEM PROTOTYPING

Mentor's VIVACETM environment allows users to compile complex embedded designs into the Mentor Graphics CelaroTM hardware emulators where a direct connection to the pre-verified embedded CPU or DSP is made for software debug access. Users can then develop and verify application software against the complete system at MHz speeds, helping them detect problems that would otherwise go unnoticed until much later in the design cycle. The resulting benefits include higher quality products that are designed right the first time and on time. For the first time tools from different disciplines work together to enable a real system prototyping allowing a combination of different abstraction levels from system description usually in C++ or other high level languages down to VHDL gate-level netlists. Hardware developer can directly communicate with firmware and even software engineers without learning new tools, since everybody will predominantly use its own known environment. The big change is that the system itself rather than the sometimes misleading written specification will be the reference. Plugging an IP-Xpress Kit into the VIVACETM environment lets customers test entire software suites of embedded systems at up to a million instructions per second before going to silicon, thereby saving significant time and money. The first kit offerings have been developed through the ARM/Mentor EDA partnership.

EMBEDDED SOFTWARE AT MENTOR GRAPHICS TOWARDS SYSTEM ON CHIP

In recent years, software has become the dominant factor in the development of embedded systems. This is very evident as system on chip (SoC) designs are being considered. In this context, software development decisions can make or break the success of a project. Among EDA companies, Mentor graphics is unique in having comprehensive support for embedded software develoment. This session includes a detailed review of the embedded software development process and consideration of how Mentor Graphics supports the flow. In addition to outlining the products and strategy of the Embedded Software Division, insight will be provided into the relationship and synergy with other Mentor Graphics divisions and technologies: hardware/ software co-verification, intellectual property and accelerated verification.


nurmi@cs.tut.fi

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