System on Chip Seminar
Compiler Technology for Configurable Processor Architectures
Monica Lam, Stanford University
SOC technology has made it feasible to design unique processor architectures to deliver the required performance of embedded applications at minimal cost and power. Many of the architectural concepts developed previously for supercomputers such as VLIW, SIMD and processor array organizations have become applicable to the embedded domain. To minimize the software development time and hence the time to market, it is critical that an effective compiler and all the associated software development tools be available. This talk describes the challenges and solutions in creating a compiler system that generates compilers for configurable processors. In particular, we will describe the fundamental technology for handling parallelism at both the instruction and processor levels.
nurmi@cs.tut.fi