System on Chip Seminar
Lecture Abstracts
- Design Technologies for Heterogeneous Architectures, Pleiades, Jan Rabaey
- Reconfigurable Digital Communication Systems On A Chip, Ravi Subramanian
- Modeling of Embedded Processors with LISA for Architecture Exploration and System-Level Simulation, Heinrich Meyr and Stefan Pees
- Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification of SoC, Vojin Zivojnovic
- Retargetable Performance Estimation using Parameterized Processor Architecture Model, Naji Ghazal
- From Application Specifications to System in Silicon, Oz Levia
- Transport Triggered Architectures (TTA), Henk Corporaal
nurmi@cs.tut.fi