soc

System on Chip Seminar

Reiner Hartenstein

Dr.-Ing. Reiner W. Hartenstein currently is professor of Computer Science and Engineering at Kaiserslautern University. He received all his academic degrees are from the EE Department at Karlsruhe University, where he later became Associate Professor of Computer Science.

Before joining Kaiserslautern he has worked in character recognition, image processing, digital and hybrid circuits and systems, and computer architecture. Since about ten years Prof. Hartenstein and his group works on reconfigurable computing and related compilation techniques. Supported by various funding agencies the achievements of his group are the definition and implementation of the high level hardware design languages KARL (textual) and ABL (graphic), the Xputer machine paradigm, the KressArray family (a reconfigurable generalization of the systolic array), and partitioning co-compilation for configware/software co-design.

Prof. Hartenstein, FPL fellow and Senior Member of the IEEE, organized numerous international workshops and conferences as a program chair (10 times), and also as industrial chair and general chair. He is founder of the PATMOS int'l workshop series on low power VLSI design and a co-founder of EUROMICRO as well as of the German multi-university E.I.S.-project (VLSI-Design). Prof. Hartenstein has authored or co-authored 15 books and more than 350 papers.


nurmi@cs.tut.fi

  SoC 1999

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  SoC 2001

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