System on Chip Seminar
Program
Wednesday, November 15
09:15 - 10:00 registration and coffee
10:00 - 10:15 opening
10:15 - 11:00 DSP-based System-on-Chip Roadmad to the Future Yves Masse, Texas
Instruments
11:00 - 11:15 break
11:15 - 12:00 C++ in SoC Design Joachim Kunkel, Synopsys
12:00 - 12:30 coffee break (2 parallel industry presentations)
12:30 - 13:15 The IMPACT Compiler Infrastructure for Future DSP/Embedded
Systems Roger Bringmann, Lucent Technologies
13:15 - 14:15 lunch
14:15 - 15:00 Mescal - Retargetable Compiler for a Family of Target
Architectures Sharad Malik, Princeton U
15:00 - 15:30 coffee break (2 parallel industry presentations)
15:30 - 16:15 Compiler Techniques for Configurable Processor Architectures
Monica Lam, Stanford U
16:15 - 16:45 coffee break (2 parallel industry presentations)
16:45 - 18:30 panel discussion "Future Trends in HW/SW Partitioning for SoC"
18:45 bus transportation
19:00 - 22:00 dinner
Thursday, November 16
08:30 - 09:15 IC Technology Development for System-on-Chip Kevin Kolwicz,
Lucent Technologies
09:15 - 09:45 coffee break (2 parallel industry presentations)
09:45 - 10:30 Solutions for Communication and Design Reuse in Gigascale
Systems-on-Chip Hannu Tenhunen, Royal Institute of Technology
10:30 - 10:45 break
10:45 - 11:30 MCM as a SoC Implementation Technology Evan Davidson, IBM
11:30 - 12:00 coffee break (2 parallel industry presentations)
12:00 - 12:45 Reconfigurable Computing Platforms Steve Guccione, Xilinx
12:45 - 14:00 lunch
14:00 - 14:45 Scalable and Customizable VLIW for Embeddded Applications Andrew
Jones and Roger Shepherd, STMicroelectronics
14:45 - 15:00 break
15:00 - 15:45 Configurable Communication Processor Architecture Wolfgang
Hoeflich, Chameleon Systems
15:45 - 16:15 coffee break (2 parallel industry presentations)
16:15 - 17:00 Mapping Matrix Algorithms on a Parallel Processor Architecture
David Strube, BOPS
17:00 - 17:15 wrap-up and closing
18:00 - 21:00 post-seminar event
nurmi@cs.tut.fi