February 1 2011
Curriculum Vitae
Personal Information
Name: Jarmo Henrik Takala
Current Employer: Tampere University of Technology
P.O.Box 553 (Korkeakoulunkatu 1)
FIN-33101
Tampere
Finland
e-mail: 
Academic Degrees
Sept. 8, 1999 Dr.Tech., Information Technology, Tampere University of Technology,
Tampere, Finland.
Thesis: Real-Time Signal Processing Systems: Parallel Algorithms and
Architectures
June 20, 1991 Lic.Tech., Electrical Engineering,
Tampere University of Technology, Tampere, Finland.
Thesis: Programming Environment for Data-Flow Systems, in Finnish.
Sept. 25, 1987 M.Sc.
(with honors), Electrical Engineering, Tampere University of Technology,
Tampere, Finland.
Thesis: Image Transmission System for Graphics Industry, in Finnish.
Positions
1.6.2001 – Head of Department, Tampere University of Technology, Department of Computer Systems, Tampere, Finland.
1.1.2000 – Professor, Tampere University of Technology, Department of Computer Systems, Tampere, Finland.
1.9.1999 – 31.12.1999 Senior Research Scientist, Tampere University of Technology, Department of Signal Processing, Tampere, Finland.
16.9.1996 – 31.8.1999 Research Scientist, Tampere University of Technology, Department of Signal Processing, Tampere, Finland.
1.9.1995 – 15.9.1996 Senior Research Engineer, Nokia Research Center, Electronics Laboratory, Tampere, Finland.
1.1.1994 – 31.8.1995 Research Scientist, VTT-Automation, Machine Automation, Tampere, Finland.
12.8.1992 – 31.12.1993 Research Scientist, Technical Research Center of Finland, Machine Automation Laboratory, Tampere, Finland.
1.1 – 31.5.1991 Research Scientist, Tampere University of Technology, Research Centre for Information Technology, Tampere, Finland.
1.8 – 31.12.1990 Teaching Assistant, Tampere University of Technology, Department of Signal Processing, Tampere, Finland.
1.1.1988 – 31.7.1990 Research Scientist, Tampere University of Technology, Research Centre for Information Technology, Tampere, Finland.
1.9.1985 – 31.12.1987 Research Assistant, Tampere University of Technology, Research Centre for Information Technology, Tampere, Finland.
3.6 –
23.8.1985 Trainee,
Nederlandse Philips Bedrijven B.V., Consumer Electronics, Eindhoven, The
Netherlands.
Memberships in Committees
Vice Chair of IEEE Signal Processing Society Technical Committee on Design and Implementation of Signal Processing Systems, 2010 – 2011
Member of IEEE Signal Processing Society Technical Committee on Design and Implementation of Signal Processing Systems, 2006 –
Member, European Network of Excellence on High-Performance Embedded Architecture and Compilation (HiPEAC), 2007 –
Track Chair, SDRÕ11 Wireless Innovation Conference and Product Exposition, Washington, DC, Nov. 29 – Dec. 2 2011
Member of Program Committee, Conference on Design and Architectures for Signal and Image Processing (DASIP), Tampere, Finland, Nov. 2-4 2011
Member of Technical Program Committee, IEEE Workshop on Signal Processing Systems (SiPS 2011), Beirut, Lebanon, Oct. 5 – 7 2011
Member of Technical Program Committee, IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Prague, Czech Republic, May 22 – 27 2011
Member of Program Committee, International Conference on Architecture of Computing Systems, Como, Italy, Feb. 22 – 25 2011
Member of Program Committee, SPIE Conference on Multimedia on Mobile Devices 2011, San Francisco, CA, Jan. 25 – 26 2011
Member of Technical Panel, European DSP Education & Research Conference (EDERC2010), Nice, France, Dec. 1 – 2 2010
Member of Technical Program Committee, SDRÕ10, Wireless Innovation Conference and Product Exposition, Washington, DC, Nov. 29 – Dec. 3 2010
Member of Program Committee, Conference on Design and Architectures for Signal and Image Processing, Edinburgh, Scotland, Oct. 26-28 2010
Member
of Scientific Committee, International
Conference on Ubiquitous Positioning
indoor Navigation and Location Based Service, Kirkkonummi,
Finland, Oct. 14 – 15 2010
Member of Technical Program Committee, IEEE Workshop on Signal Processing Systems (SiPS 2010), San Francisco Bay Area, USA, Oct. 6 – 8 2010
Special
Session Co-Chair, IEEE International Conference on Computer Design
(ICCD), Amsterdam, the
Netherlands, Oct. 6 – 8 2010
Technical Program Committee Chair, The International Symposium on System-on-Chip, Tampere, Finland, Sept. 28 – 30 2010
Member
of Technical Program Committee, International
Conference on Field Programmable Logic and Applications, Milano, Italy,
Aug. 31 – Sept. 2 2010
Program
Vice Chair (Embedded Computing and Systems track), International
Conference on Frontier of Computer Science and Technology, Changchun,
China, Aug. 18 – 22
2010
General Chair, International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, Samos, Greece, July 19 – 22 2010
Member of Program Committee, IEEE International Conference on Embedded Software and Systems, Bradford, UK, June 29 – July 1 2010
Member
of Program Committee, 23rd International Conference
on Architecture of Computing Systems (ARCSÕ10), Hannover, Germany, Feb. 22
– 25 2010
Member
of Program Committee, 2nd Workshop on
Parallel Programming and Run-Time Management Techniques for Many-Core
Architectures (2PARMA), Hannover, Germany, Feb. 22 – 25 2010
Member of Program Committee, SPIE Conference on Multimedia on Mobile Devices 2010, San Francisco, CA, Jan. 18 – 19 2010
Technical Program Co-Chair, IEEE Workshop on Signal Processing Systems (SiPS 2009), Tampere, Finland, Oct. 7 – 9 2009
Member
of Program Committee of Processor Architecture track, IEEE International Conference on Computer Design, Lake Tahoe, CA,
Oct. 4 – 7 2009
Technical Program Committee Chair, The International Symposium on System-on-Chip, Tampere, Finland, Oct. 4 – 7 2009
Symposium Chair, International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, Samos, Greece, July 20 – 23 2009
Member
of Program Committee, IEEE International
Conference on Embedded Software and Systems (ICESS-09), Hangzhou, China,
May 25-27 2009.
Member of Program Committee, ACM Int. Conf. Computing Frontiers, Ischia, Italy, May 18 – 20 2009
Member of Program Committee, 22nd International Conference on Architecture of Computing Systems (ARCSÕ09), Delft, The Netherlands, March 10 – 13 2009
Member of Program Committee, SPIE Conference on Multimedia on Mobile Devices 2009, San Jose, CA, Jan. 19-20 2009
Member of Program Committee, 3rd International Workshop on Embedded Software Optimization, Shanghai, China, Dec. 17 – 20 2008
Technical Program Committee Chair, The International Symposium on System-on-Chip, Tampere, Finland, Nov. 4 – 6 2008
Co-Chair of Processor Architecture track, IEEE International Conference on Computer
Design, Lake Tahoe, CA, Oct. 12 – 15 2008
Member
of Technical Program Committee, IEEE Workshop
on Signal Processing Systems, Washington, DC, Oct. 9 – 10 2008
Member of Program Committee, IEEE International Symposium on Embedded Computing, Beijing, China, Oct. 6 – 8 2008
Member of Program Committee, International Conference on Embedded Software and Systems, Chendu, Sichuan, China, July 29 – 31 2008
Symposium Chair, International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, Samos, Greece, July 21 – 24 2008.
Program Co-Chair, SPIE Conference on Multimedia on Mobile Devices 2008, San Jose, CA, USA, Jan. 26 – 31 2008
Technical Program Committee Chair, The International Symposium on System-on-Chip, Tampere, Finland, Nov. 20 – 21 2007
Member of Technical Program Committee, IEEE Workshop on Signal Processing Systems, Shanghai, China, Oct. 17 – 19 2007
Member of Program Committee, International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, Samos, Greece, July 16 – 19 2007
Member of Program Committee, ACM International Conference on Computing Frontiers, Ischia, Italy, May 7 – 9 2007.
Program Co-Chair, SPIE Conference on Multimedia on Mobile Devices 2007, San Jose, CA, USA, Jan. 29 – 30 2007
Technical Program Chair, The International Symposium on System-on-Chip, Tampere, Finland, Nov. 13 – 16 2006
Member of Program Committee, IFIP International Conference on Network and Parallel Computing, Tokyo, Japan, Oct. 2 – 4 2006
General Chair, International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, Samos, Greece, July 17 – 20 2006
Member of Steering Committee, International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, Samos, Greece, July 17 – 20 2006
Member of Program Committee, The 20th ACM International Conference on Supercomputing, Cairns, Australia, June 28 – July 1 2006
Member of Technical Panel, The European DSP Education and Research Symposium, Munich, Germany, April 4 2006
Co-Chair, SPIE Conference on Multimedia on Mobile Devices, San Jose, CA, USA, Jan. 16 – 17 2006
Scientific Program Chair, The International Symposium on System-on-Chip, Tampere, Finland, Nov. 15 – 17 2005
Finance Chair, 15th Conference on Field Programmable Logic and Applications, Tampere, Finland, Aug. 24 – 26 2005
Program Chair, Fifth International Workshop on Systems, Architectures, Modeling, and Simulation, Samos, Greece, July 18 – 22 2005
Member of Technical Program Committee, IEEE International Conference on Multimedia and EXPO, Amsterdam, the Netherlands, July 6 – 8 2005
Co-Chair, SPIE Conference on Multimedia on Mobile Devices, San Jose, CA, USA, Jan. 17 – 18 2005
Scientific Program Chair, The International Symposium on System-on-Chip, Tampere, Finland, Nov. 16 – 18 2004
Member of Technical Panel, The European DSP Education and Research Symposium, Birmingham, UK, Nov. 16 2004
Member of Program Committee, Fourth International Workshop on Systems, Architectures, Modeling, and Simulation, Samos, Greece, July 19 – 21 2004
Scientific Program Chair, The International Symposium on System-on-Chip, Tampere, Finland, Nov. 19 – 21 2003
Program Chair, Workshop on Transport Triggered Architectures, Tampere, Finland, Nov. 25 – 26 2002
Member of Technical Program Committee, International Conference on Telecommunications, Beijing, China, June 23 – 26 2002
Editor Activities for Journals
Area Editor, IEEE Transactions on Signal Processing, Apr. 19 2010 –
Associate Editor, IEEE Transactions on Signal Processing, Nov. 1 2007 –
Member of Editorial Board, Journal of Signal Processing Systems, 2008 –
Member of Editorial Board, Hindawi Journal of Electrical and Computer Engineering, 2008 –
Member of Editorial Board, EURASIP Research Letters in Signal Processing, 2007 – 2009
Associate
Editor,EURASIP Journal on Embedded
Systems, 2006 –
Managing
Guest Editor, Springer Analog Integrated
Circuits & Signal Processing, Special Issue on SDRÕ10, (under review)
Managing
Guest Editor, Springer Journal of Signal
Processing Systems, Special Issue on DISPS track in IEEE ICASSP 2010, (under review)
Managing
Guest Editor, Springer Journal of Signal
Processing Systems, Special Issue on IEEE SiPS 2009, (under review)
Managing
Guest Editor, Springer Journal of Signal
Processing Systems, Special Issue on DISPS track in IEEE ICASSP 2009
Managing
Guest Editor, Springer Journal of Signal
Processing Systems, Special Issue on IEEE SiPS 2008
Managing
Guest Editor, Springer Journal of Signal
Processing Systems, Special Issue on DISPS track in IEEE ICASSP 2008
Managing Guest Editor, Springer Journal on VLSI Signal Processing, Special Issue on Embedded Computer Systems for DSP, 2008
Managing
Guest Editor, Elsevier Journal on Systems Architecture, Special
Issue on Architectures, Modeling,
and Simulation for Embedded Processors, 2007
Managing Guest Editor, EURASIP Journal on Embedded Systems, Special Issue on Embedded Digital Signal Processing Systems, 2007
Referee Activities for Journals
ACM Transactions on Embedded Computing
ETRI Journal
Elsevier Journal on Systems
Architecture
EURASIP Journal of Embedded Systems
IEE Electronics Letters
IEE Proceedings – Computers and
Digital Techniques
IEEE Transactions on Circuits and Systems I: Regular Papers
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal
Processing
IEEE Transactions on Circuits and Systems for Video Technology
IEEE Transactions on Computers
IEEE Transactions on Signal Processing
IEEE Signal Processing Letters
IEEE Journal of Solid-State Circuits
IEEE Communications Letters
Journal of Applied Signal Processing
Signal Processing
Positions of Trust
1.1.2011 – 31.12.2013 Vice Dean, Faculty of Computing and Electrical Engineering, Tampere University of Technology
1.1.2011 – 31.12.2013 Member of Board, Faculty of Computing and Electrical Engineering, Tampere University of Technology
1.1.2010 – 31.12.2010 Vice Member of Academic Board of Tampere University of Technology
5.9.2009 - Member of Electronics and embedded Systems Branch Group of the Federation of Finnish Technology Industries
1.1.2008 – 31.12.2013 Head of International MasterÕs Degree Programme in Information Technology, Tampere University of Technology, Finland
1.1.2007 – 1.4.2007 Member of Working Group preparing TUT Project Management Procedures, Tampere University of Technology, Finland
1.1.2005 – 31.12.2007 Member of Board of Edutech, Tampere University of Technology, Finland
1.1.2005 – 31.12.2007 Vice Member of the Department Council of Electrical Engineering, Tampere University of Technology, Finland
19.4.2004 – 31.8.2005 Member of Working Group preparing TUT Innovation Plan, Tampere University of Technology, Finland
16.6.2003 – 31.1.2004 Member of Working Group preparing TUT Strategy 2004-2008, Tampere University of Technology, Finland
1.3.2003 – 31.12.2007 Vice Member of Board of Optical Research Center, Tampere University of Technology, Finland
1.1.2002 – 31.12.2007 Member of Board of Digital Media Institute, Tampere University of Technology, Finland
1.1.2002 – 31.12.2004 Vice Member of the Department Council of Information Technology, Tampere University of Technology, Finland
1.6.2001 – 28.2.2003 Member of Board of Optical Research Center, Tampere University of Technology, Finland
1.6.2001 – 1.6.2007 Member of Board of Graduate School in Electronics, Telecommunications, and Automation, Helsinki University of Technology, Finland
Reviewer for Professorships
Reviewer for professorship in Computer Engineering, University of Oulu, 2010.
Reviewer for Professorship on Computing and Computer Architectures at VTT Electronics, Finland, 2007.
Reviewer for Professorship on Signal Processing Architectures and Systems, Leibniz UniversitŠt Hannover, Germany, 2007.
Reviewer for Docentship (Adjunct Professor) in Telecommunications Engineering, University of Oulu, 2007.
Reviewer for Professorship on Information Technology at University of JyvŠskylŠ, Finland, 2004.
Thesis Supervision and Inspection
Doctor of Philosophy Thesis: Inspection
G. Pay‡ Vay‡, Design and Analysis of a Generic VLIW Processor for Multimedia Applications, Leibniz UniversitŠt Hannover, Germany, 2010.
M. Ahmadi, High-Performance Processing in Networked and Grid Environments, TU Delft, the Netherlands, 2010.
J. Boutellier, Quasi-Static Scheduling for Fine-Grained Embedded Multiprocessing, University of Oulu, Finland, 2009.
C. Galuzzi, Automatically Fused Instructions, Technical University of Delft, the Netherlands, 2009.
N. Agarwal, System-Level Design of Power Efficient FSMD Architectures, University of Victoria, Canada, 2009.
S. McKeown, A System Level Design Methodology for Power Efficient DSP on FPGA, The QueenÕs University, Belfast, UK, 2009.
S. Lafond, Simulation of Embedded Systems for Energy Consumption Estimation, bo Akademi University, Finland, 2008.
I. Sourdis, Design & Algorithms for Packet and Content Inspection, Technical University of Delft, the Netherlands, 2007.
D. R. H. Calder—n Rocabado, Arithmetic Soft-Core Accelerators, Technical University of Delft, the Netherlands, 2007.
I. Antochi, Tile-Based Rendering Suitability for Low-Power 3D Graphics Accelerators, Technical University of Delft, the Netherlands, 2007.
T. Toivonen, Efficient Methods for Video Coding and Processing, University of Oulu, Finland, 2007.
S. Virtanen, A Framework for Rapid Design and Evaluation of Protocol Processors, University of Turku, Finland, 2004.
Doctor of Technology Thesis: Inspection
M. Tommiska, Applications of Reprogrammability in Algorithm Acceleration, Helsinki University of Technology, Espoo, Finland, 2004.
Doctor of Technology Thesis: Supervision
Seppo Turunen, Weak Signal Acquisition in Satellite Positioning, Tampere Univ. Tech., 2010.
Ismo HŠnninen, Computer Arithmetic on Quantum-Dot Cellular Automata Nanotechnology, Tampere Univ. Tech., 2009.
Perttu Salmela, Implementations of Baseband Functions for Digital Receivers, Tampere Univ. Tech., 2009.
Jari Heikkinen, Design and Analysis of Program Compression Methods for Customizable Parallel Processor Architectures, Tampere Univ. Tech., 2007.
Hanna Sairo, Error Detection in Personal Satellite Navigation, Tampere Univ. Tech., 2006.
Jussi Collin, Investigations of Self-Contained Sensors for Personal Navigation, Tampere Univ. Tech., 2006. (Supervision in collaboration with G. Lachapelle from University of Calgary, Canada)
Heidi Kuusniemi, User-Level Reliability and Quality Monitoring in Personal Satellite Navigation, Tampere University of Technology, 2005. (Supervision in collaboration with G. Lachapelle, University of Calgary, Canada)
Luke A. Williams, Adaptive Filters – Novel Structures, Algorithms and Applications, Tampere Univ. Tech., 2004.
Tuomas JŠrvinen, Systematic Methods for Designing Stride Permutation Interconnections, Tampere Univ. Tech., 2004.
Jari Nikara, Application-Specific Parallel Structures for Discrete Cosine Transform and Variable Length Decoding, Tampere Univ. Tech., 2004. (Supervision in collaboration with S. Vassiliadis, Technical University of Delft, the Netherlands)
Arto Kantsila, Neural Network Algorithms for Equalization of Data Bursts, Tampere Univ. Tech., 2004.
Harri Klapuri, Hardware-Software Codesign with Action Systems, Tampere Univ. Tech., 2003.
Licenthiate of Technology Thesis: Supervision and
Inspection
P. MŠkelŠ, Local Positioning Systems and Indoor Navigation, Tampere Univ. Tech., 2008.
J. Virtanen, Processor Core Optimized for Radix-4 Decimation-in-Time Fast Fourier Transform, Tampere Univ. Tech., 2007.
A. Norkin, Multiple Description Coding of Images and Video, Tampere Univ. Tech., 2005.
H. Klapuri, Specification and Design of Embedded Systems Using Temporal Logic, Tampere Univ. Tech., 1997.
Master of Science Thesis: Supervision and Inspection
T. Laine, Improvement of Fault Analysis in Mobile Service using Software Crash Logs, Tampere Univ. Tech., 2010. In Finnish.
J. Salonen, Use of Fibre Optic Link in Antenna Measurement System, Tampere Univ. Tech., 2010. In Finnish.
A. Avanne, Technology Trends on Reconfigurable Logic, Tampere Univ. Tech., 2010.
J.-P. VŠinšlŠ, Display Driver Performance in Embedded Systems, Tampere Univ. Tech., 2010.
O.-P. Pohjolainen, Communications Protocol for Medical Measurement Device, Tampere Univ. Tech., 2010.
V. Saroja-Narayanan, Streaming Audio Decoding on Transport Triggered Architectures, Tampere Univ. Tech., 2010.
A. Perttula, WLAN Positioning with Mobile Phone, Tampere U. Tech., 2010.
V.-P. JŠŠskelŠinen, Retargetable Compiler Backend for Transport Triggered Architectures, Tampere U. Tech., 2010.
S. Gulfam, Register-Based Permutation Networks, Tampere U. Tech., 2010.
V.-P. JŠŠskelŠinen, Retargetable Compiler Backend for Transport Triggered Architectures, Tampere U. Tech., 2010.
A. Javaid, On the Implementation of Multi Power Domain Design, Tampere U. Tech., 2009.
J. MŠntyneva, Automated Design Space Exploration of Transport Triggered Architectures, Tampere U. Tech., 2009.
L. Nurmi, Programmable Accelerator for Trigonometric Transforms in Video Coding, Tampere U. Tech., 2009.
M. Kirkko-Jaakkola, Carrier Phase Based Techniques in Personal Satellite Positioning, Tampere U. Tech., 2008.
S. Merenkivi, Characterization of an Underwater Sound Reproducing System, Tampere U. Tech., 2008. In Finnish.
P. Miettinen, Wireless Sensor Data Retrieval, Tampere U. Tech., 2008. In Finnish.
A. Halonen, Efficiency and Structure Optimization in Logistic and Supply Chain, Tampere U. Tech., 2008. In Finnish.
A. Knuutila, Parallel Signaling in ISDN Network using .NET Framework, Tampere U. Tech., 2008. In Finnish.
A. MetsŠhalme, Instruction Scheduler Framework for Transport Triggered Architectures, Tampere U. Tech., 2008.
T. Julin, Design Tools for Power Integrity, Tampere U. Tech., 2008.
H. Kulmala, XML-Based Message-Passing Application in Symbian System, Tampere U. Tech., 2008. In Finnish.
H. Sorokin, Methods for Satellite Positioning Signal Acquisition, Tampere U. Tech., 2008.
J. Parviainen, Satellite Acquisition using Incomplete
Position Information,Tampere U. Tech., 2007.
L. Laasonen, Program Image and Processor Generator for Transport Triggered
Architectures, Tampere U. Tech., 2007.
K. Lampila,
Implementation of Signal Processing Algorithms n General-Purpose Processors,
2007. In Finnish.
P.-K. Poiksalo,
Reference Implementations of Media IC
Family, Tampere U. Tech., 2007. In Finnish.
T. Kujala, Simulation Model for GPS Receiver System, Tampere
U. Tech., 2006.
T.
Partanen, Acquisition Unit for GALILEO
Positioning System, Tampere U. Tech., 2006.
H. LŠhteenmŠki, The Development
of Harvester Headmodule, Tampere U. Tech., 2006. In Finnish.
M.
Lepistš, Assembly Compiler for Parametrizable Parallel Processor, Tampere U. Tech.,
2006.
L.
Jouppila, A Frequency Spectrum Analyzer
in the Modicon Quantum Programmable Logic Controller,
Tampere U. Tech., 2006.
R. MŠkinen, Fast Fourier
Transform on Transport Triggered Architectures, Tampere U. Tech.,
2005.
P. JŠŠskelŠinen, Instruction
Set Simulator for Transport Triggered Architectures, Tampere U. Tech.,
2005.
T. PitkŠnen, Experiments
of TTA on ASIC Technology, Tampere U. Tech., 2005.
T. LatvakŠyrŠ, Symbian
Boot in 3G Mobile Phone, Tampere U. Tech., 2005.
A. Saukko, Test
Emulator for Robust Header Compression, Tampere
U. Tech., 2005.
V. Karppinen, Video
Streaming over the General Packet Radio Service, Tampere U. Tech., 2004.
M. Niiranen, Transport
Triggered Architectures on FPGA, Tampere U. Tech., 2004.
T. Ahtiainen, Comparison
of Pipelined Butterfly Units for Fast Fourier Transform, Tampere U. Tech., 2004.
T.
Rantanen, Cost Estimation for Transport
Triggered Architectures, Tampere U. Tech., 2004.
J. Koivusaari, Improvements
for Video Codec Based on Three-Dimensional Discrete Cosine Transform,
Tampere U. Tech, 2004.
J. Hiltunen, Compensation of Oscillator Ageing, Tampere U. Tech, 2004. In Finnish.
M. Ylinen, Algorithms and Architectures for Fixed-Point Matrix Inversion,
Tampere U. Tech., 2003.
I. HŠnninen,
Communications and Interface Units for Distributed Sensor Systems, Tampere
U. Tech., 2003. In Finnish.
J. Sertamo, Processor Generator for Transport Triggered Architectures, Tampere
U. Tech., 2003.
V. Machin, Multiple Description Coding Systems for Image Transmission over
Unreliable Channels, Tampere U. Tech., 2003.
P. Engblom, Implementation of Signal Processing ASIC Implementations in Graphical
Design Environment, Tampere U. Tech., 2003. In Finnish.
K. Kohvakka, Graphical Design Methods for Processor-Based DSP Systems, Tampere
U. Tech., 2003. In Finnish.
R. Rosendahl, Fixed-Point
Error Analysis of Pipelined Discrete Cosine Transform Architectures,
Tampere U. Tech., 2003.
J. San JosŽ Garc’a, Multiresolution
Techniques Using Discrete Cosine Transform Decomposition for Motion Estimation, Tampere U. Tech., 2003.
J. NykŠnen, Mapping Action Systems to Hardware Descriptions, Tampere U. Tech.,
2003.
M. SuonpŠŠ, Program for Measuring WWW Page Download Times, Tampere U. Tech.,
2003. In Finnish.
P. Rantanen, Embedded
Software for Handheld Navigation Systems, Tampere U. Tech., 2003.
T. Kolkka, Evaluation of Logic Synthesis Methods, Tampere U. Tech., 2003.
J. MŠkitalo, High Level ASIC Design Methodologies, Tampere U. Tech., 2002.
T. Kalliolevo, Video Coding Using Three-Dimensional
Discrete Cosine Transform, Tampere U. Tech., 2002.
T. Korhonen, Video
Streaming Server for Wireless Terminals, Tampere U. Tech., 2002.
A. Burian, Channel Equalization Using Evolutionary Programming and Classification
Methods, Tampere U. Tech., 2002.
S. Lahtinen, Hardware
Scheduling of DisCo Specifications, Tampere U.
Tech., 2002.
J. Taavela, Portable Multi-Sensor Hardware System for Personal Navigation, Tampere
U. Tech., 2002.
P. Tenhunen, Measuring and Analysis of Email Traffic in IP Networks, Tampere U.
Tech., 2002. In Finnish.
K. Punkka, Memory-Based Perfect Shuffle Permutation Networks, Tampere U. Tech.,
2002.
H. Uotila, Protocol Implementation on Embedded Systems Using Formal Model,
Tampere U. Tech., 2002.
J. Heiskanen, Modeling of Wireless Application Protocol in
SDL, Tampere U. Tech., 2002. In Finnish.
T. Mšttšnen, Content Shaping for Wireless Terminals, Tampere U. Tech., 2002.
E. Ikonen, Security in
Wireless Terminals, Tampere U. Tech., 2001. In Finnish.
P. PackalŽn, VoIP on Wireless
Terminals, Tampere U. Tech., 2001.
J. Heikkinen, DSP Applications on Transport Triggered
Architectures, Tampere U. Tech., 2001.
M. VŠŠtŠnen, Virtual Hardware
for Software Development, Tampere U. Tech., 2000.
J. Nikara, Pipelined Architectures for Discrete Cosine
Transform, Tampere U. Tech., 2000.
S. Linghao, Virtual
Prototyping for Telecommunication Systems, Tampere U. Tech., 2000.
P. Salmela, Performance Analysis in SDL Environment,
Tampere U. Tech., 2000.
J. Laitinen, Simulation of Embedded Systems, Tampere
U. Tech., 2000. In Finnish.
T. JŠrvinen, Design of Embedded Systems with
Telecommunications Application, Tampere U. Tech., 1999.
M. Simonen, System Level
Verification Using Reusable VHDL Test Bench Structures, Tampere U. Tech.,
1999.
M. Koikkalainen, Implementation
of Constant Geometry Architectures for Discrete Fourier and Cosine Transforms,
Tampere U. Tech., 1999.
A. Kauppi, Hardware-Assisted
Debugging Methods, Tampere U. Tech., 1999. In Finnish.
J. HeikkilŠ, Configurable
Implementation of Viterbi Decoder, Tampere U. Tech., 1999.
J. Tanskanen, Application of Parallel Memories in Video
Coding, Tampere U. Tech., 1999. In Finnish.
A. Jore, Implementation of 2-D
DCT for Real Time Low Bit Rate Video Coding, Tampere U. Tech., 1998.
K. Paju, The Use of A System
Simulation Tool in DSP Software Development and Testing, Tampere U. Tech.,
1998.
A. Latva-aho, A Performance
Study of DSP Architectures, Tampere U. Tech., 1998.
M. Giannini, Specification and
System Design of Telecommunications Systems, Tampere U. Tech., 1998.
P. LehtimŠki, Hardware/Software
Co-Design in POLIS Environment, Tampere U. Tech., 1998.
P. Martikainen, Implementation
of Co-Design Environment, Tampere U. Tech., 1998.
A. …rn, Evaluation of
Behavioral Synthesis Tools, Tampere U. Tech., 1997.
J. Matikainen, Still Image Compression on Digital Signal
Processor, Tampere U. Tech., 1997.
T. Jalonen, Speech Codec
Implementation on DSP Processor, Tampere U. Tech., 1997.
T. Naumanen, Automatic Gain
Control in Digital Mobile Phone, Tampere U. Tech., 1997. In
Finnish.
J. Vainikka, Implementation of
Cellular Processor System, Tampere U. Tech., 1992. In
Finnish.