Professor Jari Nurmi

Supervised Theses

Theses are shown in reverse chronological order

Doctoral Theses Supervised

  • Francescantonio Della Rosa, 2018: Cooperative Positioning in Presence of Human-Induced Perturbations
  • Padma Bolla, 2018: Advanced Tracking Loop Architectures for Multi-Frequency GNSS Receiver
  • Ville Eerola, 2018: Design and Silicon Area Optimization of Time-Domain GNSS Receiver Baseband Architectures
  • Sajjad Nouri, 2018: Power and Energy Aware Heterogeneous Computing Platform
  • Farid Shamani, 2017: Design of Intellectual Property-Based Hardware Blocks Integrable with Embedded RISC Processors
  • Tommi Paakki, 2017: Next Generation Multi-System Multi-Frequency GNSS Receivers
  • Waqar Hussain, 2014: Design and Development from Single Core Reconfigurable Accelerators to a Heterogeneous Accelerator-Rich Reconfigurable Platform
  • Sarang Thombre, 2014: Test Bench Solutions for Advanced GNSS Receivers: Implementation, Automation and Application
  • Omer Anjum, 2014: Software-Defined Radio: Challenges and Opportunities in Baseband Processing Architectures
  • Roberto Airoldi, 2013: Design and Implementation of Software Defined Radios on a Multi-Processor Architecture
  • Subayal Aftab Khan, 2012: System Level Performance Evaluation of Distributed Embedded Systems
  • Piia Saastamoinen, 2012: Program Code Compression on Single- and Multi-Core Systems
  • Sanna Määttä, 2011: Modeling Embedded Applications for On-Chip Multiprocessing Systems
  • Heikki Hurskainen, 2009: Research Tools and Architectural Considerations for Future GNSS Receivers
  • Fabio Garzia, 2009: From Run-Time Reconfigurable Coarse-Grain Arrays to Application-Specific Accelerator Design
  • Claudio Brunelli, 2008: Design of Hardware Accelerators for Embedded Multimedia Applications
  • Xin Wang, 2008: Designing Globally-Asynchronous Locally-Synchronous On-Chip Communication Networks
  • Yang Qu, 2007: System-level Design and Configuration Management for Run-time Reconfigurable Devices
  • Tapani Ahonen, 2006: Network-Based Single-Chip System Architectures
  • Heikki Kariniemi, 2006: On-Line Reconfigurable Extended Generalized Fat Tree Network-on-Chip for Multiprocessor System-on-Chip Circuits
  • Lasse Harju, 2006: Programmable Receiver Architectures for Multimode Mobile Terminals
  • Tapio Ristimäki, 2005: Reconfigurable IP Blocks: a MIMD Approach
  • David Sigüenza Tortosa, 2005: PROTEO: The Development of a Practical Network-on-Chip
  • Christian Panis, 2004: Scalable DSP Core Architecture Addressing Compiler Requirements
  • Mika Kuulusa, 2000: DSP Processor Core-Based Wireless System Design
  • Doctoral Theses Opponent or Evaluator

  • Irfan Ullah, Advanced Image Reconstruction Algorithms in MRI, PhD Thesis, COMSATS Institute of Information Technology, Pakistan, February 2019. Reviewer.
  • Anil Kanduri, Adaptive Knobs for Resource Efficient Computing, University of Turku, Finland, December 2018. Opponent.
  • Priit Ruberg, Energy Consumption and Performance Estimation of Embedded Software, Tallinn University of Technology, Estonia, September 2018. Opponent.
  • Satyajit Das, Architecture and Programming Model Support For Reconfigurable Accelerators in Multi-Core Embedded Systems, University of Bologna, Italy / Université Bretagne Sud, France. Pre-examiner in April 2018, member of evaluation board in June 2018.
  • Farooq Alam Orakzai, Energy Efficient Radio Resource Management in Wireless Networks, PhD Thesis, COMSATS Institute of Information Technology, Pakistan, March 2018. Reviewer.
  • Enik Shytermeja, Design and Performance of a GNSS Single-Frequency Multi-constellation Vector Tracking Architecture fof Urban Environments, PhD Thesis, ENAC / Institut National Polytechnique de Toulouse, France. Pre-examiner in November 2017 and president of evaluation board in December 2017.
  • Mohammad-Hashem Haghbayan, Energy-Efficient and Reliable Computing in Dark Silicon Era, DrTech Thesis, University of Turku, Finland, November 2017. Pre-reviewer.
  • Danish Mahmood, Realistic Scheduling Mechanisms for Smart Homes, PhD Thesis, COMSATS Institute of Information Technology, Pakistan, June 2017. Reviewer.
  • Usman Ali Gulzari, Design and Analysis of Optimized Router Architecture and Scalable Network Topology for On Chip Communication, PhD Thesis, COMSATS Institute of Information Technology, Pakistan, March 2017. Reviewer.
  • Chuanying Zhai, Reliable RFID Communication and Positioning System for Industrial IoT, PhD Thesis, Royal Institute of Technology (KTH), Sweden, December 2016. Opponent.
  • Timon ter Braak, Run-Time Mapping: Dynamic Resource Allocation in Embedded Systems, PhD Thesis, University of Twente, The Netherlands. Member of evaluation board in pre-examination in Fall 2016 and public defense in December 2016.
  • Mohammad Badawi, Adaptive Coarse-Grain Reconfigurable Protocol Processing Architecture, PhD Thesis, Royal Institute of Technology (KTH), Sweden, November 2016. Member of evaluation board.
  • Qin Zhou, Sub-Nyquist Sampling Impulse Radio UWB Receivers for the Internet-of-Things, PhD Thesis, Royal Institute of Technology (KTH), Sweden. Pre-reviewer in August 2016, Member of evaluation board in December 2016.
  • Sheeraz Ahmed, Towards Cooperative Routing in Underwater and Body Area Wireless Sensor Networks, COMSATS Institute of Information Technology, PhD Thesis, Pakistan, November 2015. Reviewer.
  • Jue Shen, Interactive RFID for Industrial and Healthcare Applications, PhD Thesis, Royal Institute of Technology (KTH), Sweden, November 2015. Member of evaluation board.
  • Ma Ning, Ultra-low-power Design and Implementation of Application-specific Instruction-set Processors for Ubiquitous Sensing and Computing, PhD Thesis, Royal Institute of Technology (KTH), Sweden, November 2015. Opponent.
  • Myriam Foucras, Performance Analysis of Modernized GNSS Signal Acquisition, PhD Thesis, ENAC / Institut National Polytechnique de Toulouse, France, February 2015. President of evaluation board.
  • Syed Jafri, Virtual Runtime Partitions for Resource Management in Massively Parallel Architectures, DrTech Thesis, University of Turku, Finland, January 2015. Opponent.
  • Antoine Blais, Feasibility of a Dual Band Direct Sampling SDR Galileo Receiver for Civil Aviation, PhD Thesis, ENAC / Institut National Polytechnique de Toulouse, France, September 2014. President of evaluation board.
  • Chenxin Zhang, Dynamically Reconfigurable Architectures for Real-time Baseband Processing, PhD Thesis, University of Lund, Sweden, May 2014. Member of evaluation board.
  • Moazzam Fareed Niazi, A Model-Based Development and Verification Framework for Distributed System-on-Chip Architecture, DrTech Thesis, University of Turku, Finland, March 2014. Opponent.
  • Abdul Naeem, Architecture Support and Scalability Analysis of Memory Consistency Models in Network-on-Chip Based Systems, Royal Institute of Technology (KTH), Sweden, March 2013. Opponent.
  • Waqar Ahmad, Core Switching Noise for On.Chip 3D Power Distribution Networks, PhD Thesis, Royal Institute of Technology (KTH), Sweden, November 2012. Member of evaluation board.
  • Davide Rossi, Multi-Processor Systems-on-Chip with Configurable Hardware Acceleration, PhD Thesis, University of Bologna, Italy, February 2012. Reviewer.
  • Mikael Millberg, Architectural Techniques for Improving Performance in Networks on Chip, PhD Thesis, Royal Institute of Technology (KTH), Sweden, December 2011. Member of evaluation board.
  • Ming Liu, Adaptive Computing based on FPGA Run-time Reconfigurability, PhD Thesis, Royal Institute of Technology (KTH), Sweden, June 2011. Member of evaluation board.
  • Morten Sleth Rasmussen, Support for Programming Models in Network-on-Chip-based Many-core Systems, PhD Thesis, Technical University of Denmark, September 2010. Member of evaluation board.
  • Luciano Ost, Abstract Models of NoC-based MPSoCs for Design Space Exploration, PhD Thesis, Pontifícia Universidade Católica do Rio Grande do Sul (PUCRS), Porto Alegre, Brazil, May 2010. Member of evaluation board.
  • Vincenzo Rana, NoC-based Reconfigurable Embedded Systems Design, PhD thesis, Politecnico di Milano, Italy, January 2010. Reviewer.
  • Kimmo Järvinen, Studies on Efficient Implementation of Cryptographic Algorithms, DrTech Thesis, Helsinki University of Technology, Finland, November 2008. Opponent.
  • Henrik Svensson, Reconfigurable Architectures for Embedded Systems, PhD Thesis, Lund University, Sweden, October 2008. Opponent.
  • Kashif Virk, System-Level Design Methodologies for Networked Multiprocessor Systems-on-Chip, PhD Thesis, Technical University of Denmark, September 2008. Member of evaluation board.
  • Iyad Al Khatib, Performance Analysis of Application Specific Multicore Systems on Chip, PhD Thesis, Royal Institute of Technology (KTH), Sweden, June 2008. Opponent.
  • Marco Santambrogio, Hardware/Software Codesign Methodologies for Dynamically Reconfigurable Systems, PhD Thesis, Politecnico di Milano, Italy. Reviewer in May 2008.
  • Nikolay Kavaldjiev, A Run-Time Reconfigurable Network-on-Chip for Streaming DSP Applications, PhD Thesis, University of Twente, The Netherlands. Member of evaluation board in pre-examination in Fall 2006 and public defence in January 2007.
  • Pasi Liljeberg, On Self-Timed Communication Architectures for Network-on-Chip, DrTech Thesis, University of Turku, Finland, Pre-examiner in November 2005.
  • Juha-Pekka Soininen, Architecture Design Methods for Application Domain Specific Integrated Computer Systems, DrTech Thesis, University of Oulu, Finland. Pre-examiner in September 2003. Opponent in May 2004.
  • Dinesh Pamunuwa, Modelling and Analysis of Interconnects for Deep-Submicron Systems-on-Chip, PhD Thesis, Royal Institute of Technology (KTH), Sweden, December 2003. One of three "betygsnämd", evaluation board member.
  • Mikael Karlsson Rudberg, DSP Algorithms and Architectures for Telecommunication, PhD Thesis, Linköping University, Sweden, September 2001. Opponent.
  • Yonghong Gao, Architecture and Implementation of Comb Filters and Digital Modulators for Oversampling A/D and D/A Converters, PhD Thesis, Royal Institute of Technology (KTH), Sweden, February 2001. One of three "betygsnämd", evaluation board member.
  • Zheng Xia, Growth and Properties of Germanium Implanted Si1-xGex on Si Heterostructures, DrTech Thesis, Tampere University of Technology, November 1997. Opponent.
  • Licentiate Theses Supervised or Evaluated

  • Jimson Mathew, Design and Evaluation of Fault Tolerant VLSI Architectures, LicTech Thesis, Royal Institute of Technology (KTH), Sweden, April 2004. (Opponent)
  • Chuansu Chen, Reusable Macro Based Synthesis for Digital ASIC Design, LicTech Thesis, Royal Institute of Technology (KTH), Sweden, May 2002. (Opponent)
  • Harri Lampinen, Modeling and Simulation Utilizing Modern Analog Circuit Simulators, LicTech Thesis, Tampere University of Technology, April 1994.
  • Markku Lindell, Hardware Realizations of Sparse Distributed Memory, LicTech Thesis, Tampere University of Technology, December 1993.
  • Jouni Isoaho, DSP ASIC Development Based on Prototyping and Bit-modeling, LicTech Thesis, Tampere University of Technology, May 1992.
  • MSc Theses Supervised

    (partial list)

    2018

  • Mohammad Hosseinvand, Design and Implementation of MIMO OFDM IEEE802.11n Receiver Blocks in Heterogeneous Multicore Architecture, MSc Thesis, Tampere University of Technology / Politecnico di Torino, Italy, November 2018.
  • 2017

  • Lander Beckers and Henning Lakiere, Efficient distribution of a computation intensive calculation on an Android device to external compute units with an Android API, MSc Thesis, Tampere University of Technology / KU Leuven, Belgium, August 2017.
  • 2016

  • Zeinab Ashjaei, Linux Kernel Functions for an Embedded Target Platform, MSc Thesis, Tampere University of Techology, June 2016.
  • Seyed Ali Hassani, Design and Implementation of FPGA-Based Multi-Rate BPSK-QPSK Modem with Focus on Carrier Recovery and Time Synchronization, MSc Thesis, Tampere University of Techology, May 2016.
  • Juho Heinijoki, Intermodulaatiokommunikaatioon perustuvan langattoman anturin mittaukset teollisuusympäristöissä, (Intermodulation Communication Based Wireless Sensor Measurements in Factory Environments), MSc Thesis, Tampere University of Technology, April 2016. In Finnish.
  • 2015

  • Raul Serna Marin, Wireless Indoor Localization using Pathloss-based Techniques, MSc Thesis, Tampere University of Technology, December 2105.
  • Leticia Trinidad Valderas Rodriguez, A Compiler Framework for a Coarse-Grained Reconfigurable Array, MSc Thesis, Tampere University of Technology / University of Madrid, Spain, August 2015
  • Diego Alonso de Diego, Narrowband Interference Rejection Studies for GALILEO Signals via Simulink, MSc Thesis, Tampere University of Technology / University of Madrid (UPM), Spain, August 2015.
  • Santiago Ros Navarro, Hardware and Software Design of a Wireless Electronic Controller for Digital Slot Car Applications, Tampere University of Technology / Technical University of Cartagena (UPCT), Spain, August 2015
  • Sajjad Nouri, Design and Implementation of Software Defined Radio Accelerators using an Adaptive Coarse Grain Reconfigurable Array and Processor Software, MSc Thesis, Tampere Univesity of Technology, June 2015.
  • 2014

  • Denis Surmann, NLOS Mitigation Techniques in GNSS Receivers Based on Level Crossing Rates (LCR) of Correlation Outputs, MSc Thesis, Tampere University of Technology / FAF University Munich, Germany, December 2014.
  • Muhammad Zohaib Hassan, Power Consumption Efficiency Analysis of Modern Smartphones Powered by Windows Phone 8 in Comparison to Android SW Platform, MSc Thesis, Tampere University of Technology, September 2014.
  • Eduard Kobak, Testing Facility for a Water Recycling Shower, MSc Thesis, Tampere University of Technology, April 2014.
  • Anuradha Dande, Simulation of Multiprocessor System Scheduling, MSc Thesis, Tampere University of Technology, April 2014.
  • Kanthi Meenal Palaniappan, System Integration and Verification of GNSS Baseband Processor, MSc Thesis, Tampere University of Technology, April 2014.
  • 2013

  • Farid Shamani, Design of a Flexible Timing Synchronization Scheme for Cognitive Radio Applications, MSc Thesis, Tampere University of Technology, December 2013.
  • Jill Steele, Instruction Decoder Design for an Embedded Processor, MSc Thesis, Tampere University of Technology, December 2013.
  • Rizwan Fazal, Implementation of Communication Receivers as Multi-Processor Software, MSc Thesis, Tampere University of Technology, December 2013.
  • Manuele Cucchi, Design and Implementation of a FFT Pruning Engine for DSA-Enabled Cognitive Radios, MSc Thesis, Tampere University of Technology and University of Bologna, May 2013.
  • Mubashir Ali, Implementing Carrier recovery for LTE (Long Term Evolution) on Transport Triggered Architecture, MSc Thesis, Tampere University of Technology, May 2013.
  • Anum Imran, Software Implementation of UMTS Turbo Code, MSc Thesis, Tampere University of Technology, May 2013.
  • Deepak Revanna, Design and Implementation of Scalable FFT Processor for Wireless Applications, MSc Thesis, Tampere University of Technology, April 2013.
  • 2012

  • Leyla Ghazanfari, Design of a Reconfigurable Multi-Core Architecture for Streaming Applications, MSc Thesis, Tampere University of Technology, June 2012.
  • Muhammad Salman, Implementing a Graphical User Interface in Qt for a System Level Multiprocesssor System-on-Chip Platform, MSc Thesis, Tampere University of Technology, June 2012.
  • 2011

  • Li Xu, Relative Positioning of Mass Market Devices in Indoor Environments, MSc Thesis, Tampere University of Technology, November 2011.
  • Nazia Kanwal, Vector Tracking Loop Design for Degraded Signal Environment, MSc Thesis, Tampere University of Technology, June 2011.
  • 2010

  • Lauri Pynnönen, RFID Technologies in Intelligent Medical Applications, MSc Thesis, Tampere University of Technology, December 2010.
  • Domenico Schiavulli, VHDL Implementation of Peak Tracking Algorithm for GALILEO Open Service Signal, MSc Thesis, Tampere University of Technology / Politecnico di Torino, December 2010.
  • Irfan Ullah, SystemC Model of Hierarchical Network-on-Chip for System-Level On-Chip Multi-Core Platform, MSc Thesis, Tampere University of Technology, October 2010.
  • Daniel Gual Gonzales, Design of an Architectural Model for the COFFEE Processor using ArchC, MSc Thesis, Tampere University of Technology / University Carlos III Madrid, September 2010.
  • Markus Moisio, Compiler Implementation for a New Embedded Processor Architecture, MSc Thesis, Tampere University of Technology, June 2010.
  • Ugne Maslova, A Multidimensional Adaptive for Web-Based Computer Assisted Learning: A Model and an Implementation, MSc Thesis, Tampere University of Technology, June 2010.
  • Srinivas Chirumari, Implementation of Graphical User Interface for GPS Receiver, MSc Thesis, Tampere University of Technology, June 2010.
  • M. Waqar Hussain, "Design of FFT Accelerators using an Adaptive Reconfigurable Device," MSc Thesis, Tampere University of Technology, March 2010.
  • Jarno Mannelin, "Modeling a RISC Instruction Set using SystemC," MSc Thesis, Tampere University of Technology, March 2010.
  • Lubin Shen, Implementation of Low-Pass Filter in GNSS Receiver, MSc Thesis, Tampere University of Technology / Kungliga Tekniska Högskolan (KTH), February 2010.
  • Ahmad Tariq, Verilog-based Signal Processing Block Design in Bluespec Environment, MSc Thesis, Tampere University of Technology, February 2010.
  • 2009

  • Jussi Raasakka, Real-Time Software GPS Receivers, MSc Thesis, Tampere University of Technology, December 2009.
  • Sarang Thombre, Characterization and Architectural Design of Radio Frequency Front-End for GNSS Receivers, MSc Thesis, Tampere University of Technology, November 2009.
  • Guanchao Xu, GNSS, Low-Cost Inertial Sensors, and Integration, MSc Thesis, Tampere University of Technology, September 2009.
  • Matti Malmstedt, Performance Analysis of Embedded Energy Management Subsystem, MSc Thesis, Tampere University of Technology, September 2009.
  • Peeta Kiikka, Design of 802.11g Mode on Multi-standard Espresso Platform, MSc Thesis, Tampere University of Technology, June 2009.
  • Jukka Leppänen, Specification Exploration for HD Radio Receiver, MSc Thesis, Tampere University of Technology, May 2009.
  • Jussi Kurki, Benchmarking Embedded Processor Core for Architecture Development, MSc Thesis, Tampere University of Technology, February 2009.
  • Roberto Airoldi, Design of a Multi-Processor System-on-Chip for Wireless Applications, MSc Thesis, Tampere University of Technology / University of Bologna, February 2009.
  • Zhongqi Liu, An Advanced Way to Implement Acquisition Algorithm in GNSS Receiver Design, MSc Thesis, Tampere University of Technology, January 2009.
  • 2008

  • Tommi Paakki, Implementation of Robust GNSS Navigation Algorithm, MSc Thesis, Tampere University of Technology, October 2008.
  • Pawan Kumar Vasu Gadipudi, Benchmarking COFFEE RISC Processor Core, MSc Thesis, Tampere University of Technology, August 2008.
  • Carmelo Giliberto, Design of a DMA Device for Efficient Data Transfer in Streaming Multimedia Applications, MSc Thesis, Tampere University of Technology / University of Bologna, June 2008.
  • Bin Hong, Interconnect Verification of System-on-Chip ASICs with Verification IP, MSc Thesis, Tampere University of Technology, February 2008.
  • Hannu Isännäinen, Verification Model of Systems with Multiple On-Chip Buses, MSc Thesis, Tampere University of Technology, February 2008.
  • 2007

  • Lauri Maasola, Register Transfer Level Power Estimation on a System-on-Chip, MSc Thesis, Tampere University of Technology, December 2007.
  • Davide Rossi, Development of a System Based on Reconfigurable Computing for Multimedia Applications, MSc Thesis, Tampere University of Technology / University of Bologna, December 2007.
  • Andrea Ferro, Reconfigurable Coarse Grain Architecture for Multimedia Algorithms, MSc Thesis, Tampere University of Technology / University of Bologna, December 2007.
  • Riccardo Mastria, Mapping of a GPS Receiver Hardware Architecture on a Reconfigurable Coarse-Grain Coprocessor, MSc Thesis, Tampere University of Technology / University of Bologna, September 2007.
  • Lari Maasalo, Langattomiin lähettimiin perustuva lämpötilojen omavalvontajärjestelmä, (Wireless Temperature Surveillance System), MSc Thesis, Tampere University of Technology, June 2007. In Finnish.
  • Lassi Nieminen, Implementation of GNSS Baseband Hardware, MSc Thesis, Tampere University of Technology, June 2007.
  • 2006

  • Antti Ojala, DSP Library for Coffee RISC Processor, MSc Thesis, Tampere University of Technology, December 2006.
  • Pasi Isotalus, Konfiguroitavan lineaarivaiheisen FIR-suodattimen toteutus, (Implementation of a Configurable Linear Phase FIR Filter), MSc Thesis, Tampere University of Technology, April 2006. In Finnish.
  • Pekka Seppä, Aritmetiikan toteutustapoja integroiduissa CMOS-digitaalipiireissä, (Implementation Methods for Arithmetics in CMOS Digital Integrated Circuits), MSc Thesis, Tampere University of Technology, February 2006. In Finnish.
  • 2005

  • Simo Lehto, "Architecture Exploration for Enhanced GPS and Galileo Tracking," MSc Thesis, Tampere University of Technology, December 2005.
  • Susheel Raj Nuguru, "Real-Time Operating System for COFFEE RISC CoreTM," MSc Thesis, Tampere University of Technology, December 2005.
  • Federico Cinelli, Evaluation and Design of a Reconfigurable Architecture for Multimedia Applications, MSc Thesis, University of Bologna, September 2005.
  • Fabio Garzia, "Peripheral Set Implementation for a RISC Microprocessor," MSc Thesis, Tampere University of Technology / University of Bologna, June 2005.
  • Hannu Aho, "Power Minimization of a WCDMA Rake Receiver using Bus Activity Reduction," MSc Thesis, Tampere University of Technology, June 2005.
  • Jarno Saarinen, "Linker Development for Embedded RISC Processor," MSc Thesis, Tampere University of Technology, April 2005.
  • Heikki Hurskainen, "Arestinvalvonnan sähköiset menetelmät," (Electronic Surveillance of Offenders), MSc Thesis, Tampere University of Technology, April 2005. In Finnish.
  • Tero Laiho, "PCI-väylän ja muistiliitynnän suorituskyvyn optimointi grafiikkasovelluksiin" (Performance Optimization of PCI Bus and Memory Interface for Graphics Applications), MSc Thesis, Tampere University of Technology, April 2005. In Finnish.
  • Tero Lehtinen, "Prosessorin VHDL-kuvauksen yhteensopivuuden verifiointi" (Compatibility Verification of a VHDL Model of a Processor), MSc Thesis, Tampere University of Technology, January 2005. In Finnish.
  • Rauli Collin, "Geneeristen grafiikkayksiköiden malinnus järjestelmäpiirin toteutukseen" (Modelling of Generic Graphics Processing Units for SoC Implementation), MSc Thesis, Tampere University of Technology, January 2005. In Finnish.
  • 2004

  • Teri Robertson, "Matched-Filter Based Acquisition Architecture for Enhanced GPS and GALILEO," MSc Thesis, Tampere University of Technology, October 2004.
  • Sanna Määttä, "SystemC-based Simulation Environment for On-Chip Communication Architecture Exploration," MSc Thesis, Tampere University of Technology, September 2004.
  • Mikko Laiho, "Low-Power SoC Design for GPS Baseband," MSc Thesis, Tampere University of Technology, August 2004.
  • Juha-Matti Tuupola, "Data Link Control Layer Solution for Wireless Sensor Connectivity," MSc Thesis, Tampere University of Technology, August 2004.
  • Markus Markkinen, "Puhelinliittymien palvelutuotannon hallintajärjestelmä" (Production Management System for Telephone Extensions), MSc Thesis, Tampere University of Technology, April 2004. In Finnish.
  • Juha Kylliäinen, "Design and Implementation of Synthesizable RISC Processor Core," MSc Thesis, Tampere University of Technology, April 2004.
  • Tuukka Kasanko, "Verification of a RISC Core Implementation," MSc Thesis, Tampere University of Technology, March 2004.
  • Juha Pirttimäki, "Implementation of PROTEO Network-on-Chip Bridge," MSc Thesis, Tampere University of Technology, February 2004.
  • 2003

  • Claudio Brunelli, "Design of a Floating-Point Unit for a RISC Microprocessor," MSc Thesis, Tampere University of Technology / University of Bologna, September 2003.
  • Timo Rintakoski, "IP-Centric SOPC Implementation of WCDMA Baseband Modem," MSc Thesis, Tampere University of Technology, March 2003.
  • 2002

  • Mikko Alho, "Implementation of Flexible Nodes in PROTEO Network," MSc Thesis, Tampere University of Technology, October 2002.
  • Aarne Heinonen, "Methods and Tools for Physical Verification, Testing, and Repair of Digital Integrated Circuits," MSc Thesis, Tampere University of Technology, September 2002.
  • Tapio Ristimäki, "RSA-salaimen ASIC-suunnittelu," (ASIC Design for RSA Encryption), MSc Thesis, Tampere University of Technology, August 2002. In Finnish.
  • Jani Okker, "Architecture for a GPS Multipath Analyzer," MSc Thesis, Tampere University of Technology, August 2002.
  • Mika Kontiala, "The Impact of Logic Style on Low-Power, Low-Voltage Digital Design," MSc Thesis, Tampere University of Technology, June 2002.
  • Lasse Harju, "Flexible Implementation of WCDMA Rake Receiver," MSc Thesis, Tampere University of Technology, June 2002.
  • Teemu Taskinen, "Hardware Implementation Architectures for Time-Frequency Transforms," MSc Thesis, Tampere University of Technology, April 2002.
  • Jarkko Malinen, "Communication Interface Hardware for GPS Multipath Analyzer," MSc Thesis, Tampere University of Technology, February 2002.
  • 2001

  • Tapani Ahonen, "HDSL2 Modem Design for Reuse," MSc Thesis, Tampere University of Technology, November 2001.
  • Marko Savolainen, "Reusable Viterbi Decoder Implementation," MSc Thesis, Tampere University of Technology, October 2001.
  • Alper Yildirim, "System-Level Verification," MSc Thesis, Tampere University of Technology, June 2001.
  • Anu Peltola, "Hard Macro Reuse in Integrated Circuit Design," MSc Thesis, Tampere University of Technology, April 2001.
  • 2000

  • Timo Ruismäki, "Reusable HDL Implementation of Ethernet MAC Layer," MSc Thesis, Tampere University of Technology December 2000.
  • Mikko Petäinen, "Standard Cell Digital Integrated Circuit Design with Links to Layout," MSc Thesis, Tampere University of Technology, December 2000.
  • Piia Simonen, "Layout Migration of a DSP from CMOS to SOI Technology," MSc Thesis, Tampere University of Technology, November 2000.
  • Hannu Laitila, "Higher Abstraction Level ASIC Design Methods," MSc Thesis, Tampere University of Technology, October 2000.
  • Heikki Kariniemi, "Design of an ATM Switch for Cable TV Network," MSc Thesis, Tampere University of Technology, October 2000.
  • Ari Korkolainen, "Wireless LAN Baseband Control," MSc Thesis, Tampere University of Technology, August 2000.
  • Henrik Jansson, "Architecture Exploration of GPS Acquisition Hardware," MSc Thesis, Tampere University of Technology, May 2000.
  • 1999

  • Jarno Leinonen, "Designing HIPERLAN Type 2 Data Link Control Receiver," MSc Thesis, Tampere University of Technology, December 1999.
  • Juha Roström, "Architectural Optimization of a DSP Core for Speech and Audio Applications," MSc Thesis, Tampere University of Technology, September 1999.
  • Pasi Lattula, "Modulaarinen videovalvontajärjestelmä," (Modular Video Surveillance System), MSc Thesis, Tampere University of Technology, June 1999. In Finnish.
  • Jaana Taskinen, "Uusien DRAM-muistitekniikoiden soveltaminen grafiikkatoiminnoissa," (New DRAM Technologies and Their Usage in Computer Graphics), MSc Thesis, Tampere University of Technology, May 1999. In Finnish.
  • 1998 (in the industry)

  • Tero Oinonen, "Clocking and Interconnections of High Speed Digital Circuits," MSc Thesis, Tampere University of Technology, August 1998.
  • Janne Takala, "Design and Implementation of a Parameterized DSP Core," MSc Thesis, Tampere University of Technology, June 1998.
  • 1997 (in the industry)

  • Vesa Köppä, "An Advanced Real-Time Prototyping Environment for Embedded DSP Systems," MSc Thesis, Tampere University of Technology, January 1997.
  • 1996 (in the industry)

  • Marko Kyrölä, "ADPCM-prosessorin suunnittelu ja mikropiiritoteutus,"(Design and IC Implementation of an ADPCM Processor), MSc Thesis, Tampere University of Technology, December 1996. In Finnish.
  • Mika Kuulusa, "Modelling and Simulation of a Parameterized DSP Core," MSc Thesis, Tampere University of Technology, October 1996.
  • Vesa Savela, "Comparison of Digital Filter Architectures using Synthesizable VHDL," MSc Thesis, Tampere University of Technology, August 1996.
  • 1995 (in the industry)

  • Mika Hoffrén, "Itseajoittuvan FIR-prosessorin suunnittelu ja toteutus integroituna piirinä:," (Design and IC Implementation of a Self-Timed FIR Processor), MSc Thesis, Tampere University of Technology, December 1995. In Finnish.
  • Jyrki Tuominen, "EDIF-tiedonsiirto elektroniikkateollisuuden alihankinnassa," (EDIF Data Transfer in Electronic Industry Subcontracting), MSc Thesis, Tampere University of Technology, March 1995. In Finnish.
  • Tuukka Vaaraniemi, "Real-Time Digital Normalisation and Hit Finding of Microstrip Detector Data," MSc Thesis, Tampere University of Technology, January 1995.
  • 1994

  • Aki Happonen, "Sovelluskohtaisten digitaalipiirien suunnittelu kahden piiritoimittajan prosessille," (Digital ASIC Design for Second Sourcing), MSc Thesis, Tampere University of Technology, December 1994. In Finnish.
  • Jarkko Oksala, "Design and Implementation of High-Performance DSP ASIC Emulation System," MSc Thesis, Tampere University of Technology, December 1994.
  • Jarkko Strengell, "Laajakaistainen korkean asteen modulaattori sigma-delta AD-muuntimeen ," (A Broadband High Order Modulator for Sigma-Delta A/D Converter), MSc Thesis, Tampere University of Technology, December 1994. In Finnish.
  • Timo Husu, "Algoritmispesifisen signaaliprosessorin suunnittelu ja toteutus," (Design and Implementation of an Algorithm Specific Signal Processor), MSc Thesis, Tampere University of Technology, December 1994. In Finnish.
  • Petri Järvinen, "Design and Implementation of Fast Hadamard Transformer," MSc Thesis, Tampere University of Technology, November 1994.
  • Mika Rintamäki, "Development of Synthesizable SDH Macro Functions using VHDL," MSc Thesis, Tampere University of Technology, September 1994.
  • Ari Aho, "Development of I/O-Interface Blocks for DSP-Macrofunction Library using VHDL," MSc Thesis, Tampere University of Technology, August 1994.
  • Tommi Nyberg, "Signaalinkäsittelyjärjestelmän kehittäminen eräässä GSM-tuoteprojektissa'" (Signal Processing System Development in a GSM Product Project), MSc Thesis, Tampere University of Technology, May 1994. In Finnish.
  • Marko Escartin, "Liikkeenestimointipiirin dataosan suunnittelu," (Design of the Data Section of a Motion Estimation Circuit), MSc Thesis, Tampere University of Technology, March 1994. In Finnish.
  • Riku Rimpelä, "Multiprocessor Implementation of Hybrid DCT Codec," MSc Thesis, Tampere University of Technology, February 1994.
  • 1993

  • Jouni Kinnunen, "Integroidun modulaattorin kehitys digitaaliseen matkapuhelimeen," (Development of an Integrated Modulator for Digital Mobile Phones), MSc Thesis, Tampere University of Technology, December 1993. In Finnish.
  • Jari Keskinen, "Development of a Synthesizable Macro Function Library using VHDL," MSc Thesis, Tampere University of Technology, September 1993.
  • Sehin Kebede, "Integrated Circuit Implementation of an Adaptive Weighted Median Filter," MSc Thesis, Tampere University of Technology, August 1993.
  • Pekka Laukkala, "Piirilevysuunnittelukirjastojen yhdenmukaistaminen elektroniikkateollisuuden alihankinnassa," (PCB Design Library Uniformization for Electronic Industry Subcontracting), MSc Thesis, Tampere University of Technology, June 1993. In Finnish.
  • Heikki Koivisto, "Pölyvirtausuunin hiukkasparametrien laseravusteinen mittaus," (Laser Measurement of Particle Parameters of a Dust Flow Furnace), MSc Thesis, Tampere University of Technology, May 1993. In Finnish.
  • Janne Laurila, "Moottorinohjaimen integrointi piille," (Silicon Integration of a Motor Controller), MSc Thesis, Tampere University of Technology, May 1993. In Finnish.
  • Tommi Raita-aho, "Sovelluskohtaisen signaaliprosessorin suunnittelu ja toteutus," (Design and Implementation of an Application Specific Signal Processor), MSc Thesis, Tampere University of Technology, May 1993. In Finnish.
  • Prasad Lakamsani, "Silicon Implementation of a Programmable Stack Filter," MSc Thesis, Tampere University of Technology, May 1993.
  • Jari Toivanen, "Väylien mallintaminen VHDL-kuvauskielellä," (Bus Modeling with VHDL), MSc Thesis, Tampere University of Technology, April 1993. In Finnish.
  • Matti Vuori, "Taajuusmuuttajan liittäminen Profibus-kenttäväylään," (Connection of a Frequency Converter to the Profibus Standard Field Bus), MSc Thesis, Tampere University of Technology, March 1993. In Finnish.
  • 1992

  • Pasi Roti, "Elektroniikan luotettavuussuunnittelu integroidussa suunnittelujärjestelmässä," (Reliability Design of Electronics in Integrated Design Environment), MSc Thesis, Tampere University of Technology. November 1992. In Finnish.
  • Markku Räsänen, "Tilaajasilmukan pienikapasiteettiset kanavointilaitteet," (Low Capacity Subscriber Loop Channelling Devices), MSc Thesis, Tampere University of Technology, September 1992. In Finnish.
  • Timo-Pekka Lassila, "Sulautettuihin järjestelmiin soveltuvan pinoprosessorin arkkitehtuurisuunnittelu ja mallintaminen GDT-ympäristössä," (Architecture Design and Modeling of a Stack Processor for Embedded Systems, in GDT Environment), MSc Thesis, Tampere University of Technology, September 1992. In Finnish.
  • Tom Leskinen, "Komponenttilevytason simulointimenetelmät ja -mallit," (PCB Level Simulation Methods and Models), MSc Thesis, Tampere University of Technology, January 1992. In Finnish.

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